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Mentor Graphics HDL Designer Series 2002.1 Speeds Creation and Analysis of Complex Chip Designs

WILSONVILLE, Ore.--(BUSINESS WIRE)--April 15, 2002--Mentor Graphics Corporation (Nasdaq:MENT - news) today announced the 2002.1 release of its HDL Designer Series(TM) tool suite for design creation, analysis and management.

The tool suite offers productivity enhancements including an improved interconnect table that enables rapid creation of high-quality, well-structured hardware description language (HDL) for any level of design complexity. HDL Designer Series speeds the creation and analysis of complex application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs) and system-on-chip (SoC) designs, allowing teams to realize rapid time to market.

"The complementary tools in the Mentor Graphics® HDL Designer Series tool suite provide designers with a complete environment for HDL design, analysis and management, regardless of their approach to HDL design," said Valerie Rachko, HDL Designer Series marketing director for Mentor Graphics. "Features such as Interface-Based Design(TM) have proven invaluable in simplifying the challenge of describing complex interconnect. Our new release strengthens documentation, visualization, debugging and design management to facilitate team design."

Interface-Based Design Methodology Simplifies Interconnect Description for Complex Designs Interface-Based Design (IBD(TM)) simplifies interconnect creation problems by displaying design interconnect structures in an easy-to-view, compact tabular format. This tabular editing environment allows designers to rapidly specify signal connections and generate the equivalent VHDL or Verilog structural description. The IBD description can also be viewed as a block diagram.

HDL Designer Series 2002.1 provides significant new features to IBD, including capabilities to:

  • Insert and delete nets and propagate changes across the hierarchy
  • Re-level hierarchy by adding or removing levels
  • Dynamically update between IBD and block diagram views
  • Expand or collapse rows and columns to customize view
  • Re-order rows and columns using drag and drop feature

Improvements to Debug Detective

The Debug Detective(TM) offering within HDL Designer Series enhances HDL simulation and improves productivity within a ModelSim® design flow. Debug Detective runs within ModelSim, using graphical and tabular diagrams of HDL source code to enhance design debug.

New features and enhancements to Debug Detective include:

  • Improved state machine rendering recognition
  • Configurable probe display
  • Improved simulation control available from simulation toolbar and ModelSim menus
  • Extended probe change information and force control

About HDL Designer Series

HDL Designer Series products cover all aspects of the design creation and management process: HDL Pilot(TM) for design management; HDL Detective(TM) for design analysis and documentation; HDL Author(TM) for text and graphical editing and documentation; HDL Designer(TM) for complete point tool functionality in a single solution with enhanced documentation; and Debug Detective, for extending debug and design analysis capabilities to ModelSim simulation solutions. HDL Designer Series is the EDA industry's most complete tool suite for HDL design, analysis and management. In addition, HDL Designer Series supports all popular simulation and synthesis tools.

Pricing and Availability

HDL Designer Series 2002.1 is available now and starts at $2,000 US for a node-locked license. The tool suite is now available for Windows® XP, Red Hat Linux 7.2 and HP-UX 11.11 platforms in addition to existing support for Windows 98, NT and 2000, Solaris 7 and 8, HP-UX 11.00 and Red Hat Linux 6.2. For more information, please visit www.hdldesigner.com

About Mentor Graphics Corporation

Mentor Graphics Corporation (Nasdaq:MENT - news) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of more than $600 million and employs approximately 3,100 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: www.mentor.com.

Mentor Graphics and ModelSim are registered trademarks of Mentor Graphics Corporation. HDL Designer Series, HDL Pilot, HDL Detective, HDL Author, HDL Designer, Debug Detective, Interface-Based Design and IBD are trademarks of Mentor Graphics. All other company or product names are the registered trademarks or trademarks of their respective owners.


Contact:
     Mentor Graphics
     Athena Willems, 503/685-1400
     athena_willems@mentor.com
     or
     Weber Shandwick
     Jason Khoury, 415/354-8391
     jkhoury@webershandwick.com

http://www.mentor.com/dsm/
http://www.mentor.com/pcb/
http://www.mentor.com/dft/
http://hdlsolutions.mentor.com/
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